Multi‐output, multi‐level, multi‐gate design using non‐linear programming
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Abstract
Summary The conventional methodology of logic circuits design is by using logic gates. Thus, most of the minimization algorithms concern a limited set of gates (complete sets), like sum of products, exclusive‐or sum of products, NAND gates, NOR gates, and so forth. In this paper, a method is proposed for minimizing multi‐output Boolean functions using any kind of two‐input gates although it can easily be extended to multi‐input gates. The method is based on non‐linear mixed integer programming. Our methodology was tested against others proposed in the literature showing that it can achieve the same or better results in all cases. The contribution of this work can be summarized in the following: (i) it is the only approach to guarantee minimality to the problem of multi‐output, multi‐level, multi‐gate design, (ii) it is general and flexible and can solve design problems with any predefined gates and gate topology, (iii) it is a novel approach which may be adopted easily to solve other kinds of logic design problems, and (iv) incompletely specified Boolean functions are accepted, in contrary to other methods.
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