Detector-embedded reconstruction of complex primitives using FPGAs

Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment2024Vol. 1069, pp. 169782–169782

G. Punzi, W. Baldini, G. Bassi, A. Contu, R. Fantechi, J. He, B. K. Jashal, S. Kotriakhova, F. Lazzari, M. Martinelli, D. Mendoza Granada, M. J. Morello, A. Oyanguren, L. Pica, Q. Shi, Francesco Terzuoli, G. Tuci, A. Xu, J. Zhuo

Abstract

The slowdown of Moore’s law and the growing requirements of future HEP experiments with ever-increasing data rates pose important computational challenges for data reconstruction and trigger systems, encouraging the exploration of new computing methodologies. In this work we discuss a FPGA-based tracking system, relying on a massively parallel pattern recognition approach, inspired by the processing of visual images by the natural brain (“retina architecture”). This method allows a large efficiency of utilisation of the hardware, low power consumption and very low latencies. Based on this approach, a device has been designed within the LHCb Upgrade-II project, with the goal of performing track reconstruction in the forward acceptance region in real-time during the upcoming Run 4 of the LHC. This innovative device will perform track reconstruction before the event-building, in a short enough time to provide pre-reconstructed tracks (“primitives”) transparently to the processor farm, as if they had been generated directly by the detector. This allows significant savings in higher-level computing resources, enabling handling higher luminosities than otherwise possible. The feasibility of the project is backed up by the results of tests performed on a realistic hardware prototype, that has been opportunistically processing actual LHCb data in parallel with the regular DAQ in the LHC Run 3.

Abstract

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