Nanoscale Component Diffusion Study of InP/SiC Heterogeneous Bonding Interface for High-Quality Optoelectronic Device Integration

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Abstract

Indium phosphide (InP) possesses excellent physical and electrical properties, rendering it particularly suitable for optoelectronic and high-speed electronic applications and thus making it a potentially significant material in integrated circuit technology. Integrating InP on a substrate with high thermal conductivity, such as silicon carbide (SiC), presents a promising solution to mitigate thermal accumulation in InP-based devices. In this study, a hydrophilic bonding process was employed to achieve direct wafer bonding of InP/SiC at room temperature (RT), resulting in an average bonding strength of 3.2 MPa and a thermal conductivity of 112.60 W m–1 K–1 at RT. The interface structure (thinned to 50 nm) was analyzed using high-resolution transmission electron microscopy (HRTEM), revealing close contact at the InP/SiC bonding interface at RT. Nanoscale component diffusion (1.8 nm) at the interface was found to enhance bonding strength. Annealing treatments at 300 and 600 °C were performed to thoroughly investigate nanoscale component diffusion and recombination at the InP/SiO2 interface. The results demonstrated component diffusion at RT with a depth of 2.63 nm. At 300 °C annealing, recrystallization of InP/SiO2 interface components led to the formation of indium oxide (In2O3) with a crystallization depth of 3.89 nm. At 600 °C, annealing caused further recrystallization, producing indium phosphate (InPO4) with a crystallization depth of 5.50 nm. These results were confirmed by X-ray diffraction (XRD) and scanning electron microscopy (SEM) analyses. Nanoscale structural analysis of the InP/SiO2 interface helps to further understand the mechanisms at heterointerfaces and improve the quality of integrated devices. Additionally, simulations calculated the effects of recrystallization products on the optical field mode and transmission loss of the InP waveguide, providing crucial design guidance for InP optoelectronic integration.

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