n-Type Behavior of Graphene Supported on Si/SiO₂ Substrates

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Abstract

Results are presented from an experimental and theoretical study of the electronic properties of back-gated graphene field effect transistors (FETs) on Si/SiO(2) substrates. The excess charge on the graphene was observed by sweeping the gate voltage to determine the charge neutrality point in the graphene. Devices exposed to laboratory environment for several days were always found to be initially p-type. After approximately 20 h at 200 degrees C in approximately 5 x 10(-7) Torr vacuum, the FET slowly evolved to n-type behavior with a final excess electron density on the graphene of approximately 4 x 10(12) e/cm(2). This value is in excellent agreement with our theoretical calculations on SiO(2), where we have used molecular dynamics to build the SiO(2) structure and then density functional theory to compute the electronic structure. The essential theoretical result is that the SiO(2) has a significant surface state density just below the conduction band edge that donates electrons to the graphene to balance the chemical potential at the interface. An electrostatic model for the FET is also presented that produces an expression for the gate bias dependence of the carrier density.

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