Balanced Magnetic Logic Gates in a Kagome Spin Ice
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Abstract
Beyond traditional charged-based devices, logic operations can also be performed with the spins in an array of magnetic nanoislands. Unfortunately, even though such nanomagnetic logic (NML) gates yield correct output individually, they could produce erroneous output when integrated into circuits. Using a section of a kagome lattice, where the so-called ``spin ice rules'' apply, the authors realize a class of NML gates, taking advantage of the system's geometrical frustration and degenerate ground states. The gate discussed in this study is $b\phantom{\rule{0}{0ex}}a\phantom{\rule{0}{0ex}}l\phantom{\rule{0}{0ex}}a\phantom{\rule{0}{0ex}}n\phantom{\rule{0}{0ex}}c\phantom{\rule{0}{0ex}}e\phantom{\rule{0}{0ex}}d$ ($i.e.$ each desired output state is at the same energy), allowing a bottom-up approach for the design of large NML circuits.
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