Processing architectures for smart pixel systems
IEEE Journal of Selected Topics in Quantum Electronics1996Vol. 2(1), pp. 24–34
D.S. Wills, W.S. Lacy, A. Lopez-Lagunas, P. May, Stephen Smith, T.M. Taha, James M. Baker, H.H. Cat, Shaoming Chai, L. Codrescu, J.L. Cruz-Rivera, J.C. Eble, Antonio Gentile, M.A. Hopper
Abstract
Smart pixel architectures offer important new opportunities for low-cost, portable image processing systems. They provide greater I/O bandwidth and computing performance than systems based on CCD and microprocessors. However, finding a balance between performance, flexibility, efficiency, and cost depends on an evaluation of target applications. This paper describes several promising architectural approaches for the realization of videoputer systems and outlines example implementations being pursued at the Georgia Institute of Technology.
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