Design and Analysis of 8-bit ripple Carry Adder using nine Transistor Full Adder
Citations Over TimeTop 10% of 2021 papers
Abstract
This paper uses a nine-transistor full adder model to design an eight-bit ripple carry adder for less power consumption. The conventional full adder design consists of 28 transistors which constitute high power consumption. Decreasing the transistor count decreases the power consumption in the circuit. A single bit full adder using a nine-transistor is implemented and using this adder, an eight-bit ripple carries adder is designed. A conventional CMOS adder, both single bit and 8-bit ripple carry adder remain also designed to compare the power outputs. Microwind-2.6a and DSCH 2.6 are used to acquire the power outputs of each circuit. To conclude, power comparisons for both single and eight-bit adders using the 9-transistor and conventional CMOS models are made.
Related Papers
- → Design and Analysis of Improved Low Power and High-Speed N-Bit Adder(2021)4 cited
- DESIGN OF 64 BIT ERROR TOLERANT ADDER(2012)
- Design of Carry Select Adder using Binary to Excess-3 Converter in VHDL(2016)