ATAC: Improving performance and programmability with on-chip optical networks
Citations Over TimeTop 11% of 2010 papers
Abstract
Given the current trends in multicore scaling, chips with 1000 cores may exist within the next 5 to 10 years. However, their promise of increased performance will only be reached if their inherent scaling and programming challenges are overcome. Meanwhile, recent advances in nanophotonic device manufacturing are making CMOS-integrated optics a reality-interconnect technology which can provide more bandwidth at lower power than conventional electronics. Perhaps more importantly, optical interconnect also has the potential to enable new, easy-to-use programming models enabled by its inexpensive broadcast mechanism. This paper introduces ATAC, a new manycore architecture that capitalizes on the recent advances in optics to address a number of challenges that future manycore designs will face. The new constraints and opportunities of on-chip optical interconnect are presented and explored in the design of ATAC. Furthermore, this paper discusses ATAC's programming models, and introduces Consumer Tagging, a novel programming model that leverages ATAC's strengths to provide high performance and scalability.
Related Papers
- → Interconnection Costs of Various Substrates-The Myth of Cheap Wire(1984)24 cited
- → Bill and Keep as the Efficient Interconnection Regime?(2002)21 cited
- → Thermo-mechanical simulations and measurements on high temperature interconnections(2011)2 cited
- → Microprocessor structure in relation to on-chip interconnection characteristics(2005)
- → Opportunities for interconnection of adjacent distribution feeders in GB networks(2017)