Processor Design for Soft Errors
ACM Computing Surveys2016Vol. 49(3), pp. 1–44
Citations Over TimeTop 13% of 2016 papers
Abstract
Today, soft errors are one of the major design technology challenges at and beyond the 22nm technology nodes. This article introduces the soft error problem from the perspective of processor design. This article also provides a survey of the existing soft error mitigation methods across different levels of design abstraction involved in processor design, including the device level, the circuit level, the architectural level, and the program level.
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