Chung‐Kuan Cheng
University of California San Diego(US)University of California, San Diego(US)
Publications by Year
Research Areas
VLSI and FPGA Design Techniques, Low-power high-performance VLSI design, Interconnection Networks and Systems, VLSI and Analog Circuit Testing, Embedded Systems Design Techniques
Most-Cited Works
- → An O-tree representation of non-slicing floorplan and its applications(1999)377 cited
- → Ratio cut partitioning for hierarchical designs(1991)240 cited
- → Optimal wire sizing and buffer insertion for low power and a generalized delay model(1996)234 cited
- → RePlAce: Advancing Solution Quality and Routability Validation in Global Placement(2018)222 cited
- → Module Placement Based on Resistive Network Optimization(1984)194 cited
- → Towards efficient hierarchical designs by ratio cut partitioning(2003)157 cited
- → ePlace(2015)