K. Mistry
Intel (United States)(US)Middlesex University(MT)Middlesex University(GB)
Publications by Year
Research Areas
Semiconductor materials and devices, Advancements in Semiconductor Devices and Circuit Design, Integrated Circuits and Semiconductor Failure Analysis, Ferroelectric and Negative Capacitance Devices, Silicon Carbide Semiconductor Technologies
Most-Cited Works
- → A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging(2007)826 cited
- → A 22nm high performance and low-power CMOS technology featuring fully-depleted tri-gate transistors, self-aligned contacts and high density MIM capacitors(2012)750 cited
- → A 90-nm logic technology featuring strained-silicon(2004)658 cited
- → A 90nm high volume manufacturing logic technology featuring novel 45nm gate length strained silicon CMOS transistors(2004)559 cited
- → A Logic Nanotechnology Featuring Strained-Silicon(2004)511 cited
- → A 90 nm logic technology featuring 50 nm strained silicon channel transistors, 7 layers of Cu interconnects, low k ILD, and 1 μm/sup 2/ SRAM cell(2003)242 cited