A fast on-chip debugging design for RISC-V processor
Journal of Physics Conference Series2021Vol. 1976(1), pp. 012056–012056
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Abstract
Abstract In order to improve the efficiency of on-chip debugging, a fast on-chip debugging design is proposed, which adopts JTAG interface and is applied in RISC-V processor. In this paper, we extend some debugging instructions, effectively reducing data entry by operating the debugging bus directly, and realize the breakpoint, pause, single step, et al., providing conveniences for the development and debugging of the software system.
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