Low-power embedded SRAM modules with expanded margins for writing
2005pp. 480–482
Citations Over TimeTop 1% of 2005 papers
Masanao Yamaoka, Noriaki Maeda, Yoshihiro Shinozaki, Yuichi Shimazaki, Koji Nii, Shigeru Shimada, Kazumasa Yanagisawa, T. Kawahara
Abstract
A low-power embedded SRAM module implements a writing margin expansion for low-voltage operation, a write replica circuit for low-power operation and a low-leakage structure. The replica circuit reduces active power by 18%, and a 512kB module operates at 450MHz, has 7.8 /spl mu/A leakage in standby, and a minimum V/sub DD/ of 0.8V.
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