NaviSim
2022pp. 333–345
Citations Over TimeTop 10% of 2022 papers
Yuhui Bao, Yifan Sun, Zlatan Feric, Michael Shen, Micah Weston, José Luis Abellán, Trinayan Baruah, John Kim, Ajay Joshi, David Kaeli
Abstract
As GPUs continue to grow in popularity for accelerating demanding applications, such as high-performance computing and machine learning, GPU architects need to deliver more powerful devices with updated instruction set architectures (ISAs) and new microarchitectural features. The introduction of the AMD RDNA architecture is one example where the GPU architecture was dramatically changed, modifying the underlying programming model, the core architecture, and the cache hierarchy. To date, no publicly-available simulator infrastructure can model the AMD RDNA GPU, preventing researchers from exploring new GPU designs based on the state-of-the-art RDNA architecture.
Related Papers
- → Parallel connected-component labeling algorithm for GPGPU applications(2010)14 cited
- Parallel Programming For High-Performance Computing on CUDA(2009)
- CUDA-NP： Realizing Nested Thread-Level Parallelism in GPGPU Applications(2015)
- Introductory on GPGPU Programming Technique(2010)
- → Новітні архітектури відеоадаптерів. Технологія GPGPU. Частина 2(2013)