Anup Jose
Government Medical College(IN)Samsung (United States)(US)
Publications by Year
Research Areas
Advancements in PLL and VCO Technologies, Radio Frequency Integrated Circuit Design, Photonic and Optical Devices, Low-power high-performance VLSI design, Analog and Mixed-Signal Circuit Design
Most-Cited Works
- → Pulsed Current-Mode Signaling for Nearly Speed-of-Light Intrachip Communication(2006)61 cited
- → Near speed-of-light on-chip interconnects using pulsed current-mode signalling(2005)46 cited
- → Distributed Loss-Compensation Techniques for Energy-Efficient Low-Latency On-Chip Communication(2007)43 cited
- → An on-chip jitter measurement circuit with sub-picosecond resolution(2005)42 cited
- → 3.3 A 0.5-to-32.75Gb/s flexible-reach wireline transceiver in 20nm CMOS(2015)39 cited
- → A 0.5–16.3 Gb/s Fully Adaptive Flexible-Reach Transceiver for FPGA in 20 nm CMOS(2015)26 cited
- → On-Chip Spectrum Analyzer for Analog Built-In Self Test(2005)21 cited
- → A Low-Power 0.5–6.6 Gb/s Wireline Transceiver Embedded in Low-Cost 28 nm FPGAs(2013)18 cited
- → A 5.2 Gb/s Receiver for Next-Generation 8K Displays in 180 nm CMOS Process(2022)16 cited
- → Distributed Loss Compensation for Low-latency On-chip Interconnects(2006)15 cited